1. Field of the Invention
The present invention relates to a processing apparatus. More specifically, the invention relates to a digital signal processor (DSP) that shares a plurality of operating resources (operating pipes) to execute a plurality of instruction streams (program strings) at once.
2. Description of the Related Art
The recent advance of microfabrication technology has allowed a number of circuits to be incorporated into a single large-scale integrated circuit (LSI). Such an LSI has a very large number of operating resources to allow a more complicated operation to be performed at high speed.
In particularly, a high-performance DSP capable of executing a plurality of instruction streams at once has to occupy operating resources until one of the instruction streams is completed in order to maximize its performance. In other words, once an instruction stream starts, an operating resource used by an instruction in the instruction stream is prevented from being released (pipeline-stalled) before the instruction stream is completed. The instruction streams can thus be increased in execution speeds.
However, a DSP that does not release any operating resources before one instruction stream is completed has a problem of very low efficiency of operations.